Jagannath (Jag)Keshava
Jag is an accomplished engineering and technology executive with a global track record of scaling high-performance teams, accelerating product innovation, and driving operational excellence across datacenter, microprocessor, and networking domains. As former VP of Engineering at Intel, he led the delivery of next-generation Xeon processors, integrating silicon, firmware, and system-level development across global teams. Jag is recognized for building and transforming engineering organizations to enable market leadership and sustained growth. He brings deep technical expertise, business acumen, and global leadership to advise boards, founders, and investors on scaling technology businesses, operational rigor, and product strategy in high-growth or turnaround environments.
With a 35-year career at Intel, Jag has held critical leadership roles across engineering, architecture and platform development, consistently driving innovation, execution, and scale. Most recently, Jag was Vice President in Intel’s Datacenter & AI Group, where he led global Xeon and IP product development, overseeing more than 2,000 engineers across hardware, firmware, and verification teams. He successfully delivered Intel’s next-generation Xeon processor, achieving breakthrough performance and schedule reliability, while optimizing R&D investment through the development of an extensible platform strategy, turning a flagship processor into a full family of scalable products.
Throughout his tenure at Intel, Jag has consistently advanced enterprise-wide innovation by aligning deep technical strategies with scalable, customer-ready solutions. In his prior role as Vice President of Platform Engineering, he led global system integration and validation for Intel’s datacenter, client, and mobile platforms, ensuring product quality, performance, and on-time delivery across a diverse portfolio. Jag created Intel’s first enterprise-wide hardware/firmware integration strategy, standardizing the use of virtual prototyping, FPGA, and emulation platforms, dramatically accelerating time-to-market and establishing a foundational engineering capability across the company.
Jag holds a Master of Science in Electrical Engineering from the University of Texas at Austin, with a focus on Computer Architecture and VLSI Design, and completed the Program in Innovation and Entrepreneurship at Stanford’s Graduate School of Business. He is named on six microarchitecture patents, has published in IEEE and Intel technical journals, and has presented at leading industry forums including ITC and DAC. A recognized industry voice, Jag has represented the sector at NSF workshops and has received multiple team honors, including the prestigious Intel Quality Award.